1.出貨報告及標籤資料建立 2.ERP資料Key in 3.檢驗報表及相關資料彙整 4.主管交辦事項

1. 會計帳務整理與登錄 2. 一般總務行政作業 3.協助倉庫出貨

1.手動/自動研磨機台操作 2.基本視圖能力 3.簡易AUTO CAD 應用 4.略懂精密模具加工流程 5.主要產品為光學模具/塑膠模具 6.其他主管交待辦事項

1.必要條件:AUTO CAD 2.拆解電極，繪製機構設計圖面 3.熟悉3D繪圖軟體(CREO/UG) 建立3D MODEL者佳 4.了解模具基本概念 5.有實務作業工作經驗，能獨立作業

1.放電機台操作(洽密，亞爾特，蘇比克) 2.基本視圖能力 3.簡易AUTO CAD 應用 4.略懂精密模具加工流程 5.其他主管交待辦事項

1.定期拜訪客戶，維繫穩定客戶關係 2.負責業務訂單接洽 3.具英語溝通能力者佳 3.無經驗可

1.品質體系維護與執行 2.信賴性測試 3.生產品質及製程異常分析 4.客訴分析及處理 5.供應商輔導、稽核與品質改善建議 6.儀器檢驗校正 7.其它主管交辦事項

1.機台設備維護 2.機台例行性清潔保養 3.固定班別，無需輪班 4.早班:41,000起,晚班:48,000起

工作內容為提供晶圓廠的設備機台保養維修駐廠服務。 1.具半導體設備機台保養與維修相關經驗者佳。 P.S.有半導體設備機台保養與維修相關實務經驗者(指可以直接進FAB上線工作),方得承認相關年資。 2.IC的產業絕對是你我的職場生涯中,唯一能夠延續下去的產業,在此產業中所累積的經驗與技能可以向下相容非常多的產業,如面板,LED,太陽能等....千萬不要錯過這難能可貴的機會~ 4.歡迎工作態度佳/紀律佳/有誠信的志同道合朋友前來面談。

1. ARM CPU subsystem platform design & integration 2. CPU post-silicon issue resolving

1. Processor ISA design 2. Cache and bus interface design 3. Simulator/modeling and architecture

• 各國專利申請包括文件準備與申請之聯絡。 • 提供MediaTek全球各據點人員與專利相關之諮詢、積極進行發明揭露、提供可專利性評估之協助。 • 執行、主導及分析專利檢索結果，提供有關有效性和不侵權之建議。 • 管理追蹤專利審查、複審、訴訟等進度。

1. Modem product planning, marketing and customer project design-in 2. Operator engagement and requirement analysis 3. Modem development project coordination and planning

Looking for 4G/5G Modem System Engineer with technical depth on Protocol/L1 and technical breadth on modem system, with cross-site collaboration and technical communication skill, capable of direct support tier-1 customers and projects and technical deep dive with customers, in charge of customer requirement analysis and customer feature development coordination, willing to proactively initiate tasks for continuous improvements on productivity and quality and modem competitiveness for the long term.

1. 負責 5G modem 通訊軟韌體整合, 從規劃/開發整合方法, 帶領測試人員驗證, 到推動問題分析解決, 完成整合工作 2. 規劃可用性驗證, 建置並優化持續整合開發/驗證環境 (Continuous Integration) 以提昇軟體品質及開發效率 3. 5G modem 軟體工程相關事務問題解決, 與 5G modem 工程團隊合作持續提昇軟/韌體品質

In this role, you will be a member of the System-on-Chip (SoC) platform modeling team, working with architecture, silicon and software engineering teams to shape the architecture of MediaTek‘s future SoCs. The position calls for independent performance modeling and analysis, documentation, and collaboration with teams across MediaTek. We are looking for highly motivated, hands-on individuals who are passionate about performance modeling of sophisticated SoC features in C++/Python to demonstrate their value and impact. Major Responsibilities: •Responsible for evaluating and improving the SoC performance and efficiency •Developing C++ performance models (C-model) of SoC architectural solutions and features. •Developing tests and microbenchmarks to represent the use cases to run on the model •Gathering and analyzing simulated performance data to evaluate architectural design alternatives under various SoC workloads and benchmarks. •Correlating performance of the SoC RTL infrastruct

Multi-RAT (6G/5G/4G/3G/2G) modem development. This is a common job description. You may involve at least one or more topics in the following: (1) architecture planning 1.1 Modem/SoC TOP system architecture 1.2 Modem/SoC CPU system design 1.3 Modem/SoC DSP system design 1.4 Modem/SoC BUS system design (2) digital circuit design and verification 2.1 baseband modules 2.2 digital front-end modules 2.3 RF/mixed-mode digital control modules 2.4 Computer/network system modules 2.5 High speed interface design (3) IP integration 3.1 Clock/reset, test modeand low power mode design 3.2 floorplan and synthesis development (4) Design methodology 4.1 design flow enhancement (low power/verification/etc) 4.2 chip MP quality control flow

This position will be involved in the design methodology development with Foundry and EDA in leading-edge process node: 1. Will work extensively with micro-architects to make best-in-class performance/power/area 2. Will drive RTL-to-GDS flow through synthesis and place-and-route to achieve competitive targets for performance/power/area 3. Will work with multi-functional engineering team to implement and validate physical design on the aspects of timing, power, area, reliability, and test-ability

類比及射頻積體電路佈局工程師

1.熟悉Linux下的開發環境 2.熟悉GCC/G++ 與相關Tool Chain 3.熟悉不同平台的cross compiler 4.熟悉WiFi driver或Linux device driver的撰寫

1) 訂定 5G 通訊系統使用的CPU及系統架構 2) 開發RTOS、記憶體管理等系統相關服務 3) 為系統效能評估開發系統化分析法、CPU及平台模擬器 4) 分析軟體行為並增進系統效能 5) 開發CPU及系統相關的驅動程式及開機流程 6) 開發自動診斷系統問題的工具 7) 藉由系統或流程行為的大數據分析, 引導團隊改善方向

1. 類比IC設計 2. 電源管理IC或ADC/PLL/Serdes類比電路整合及下線

1. SOC/IP 整合工作, 從RTL到GDS 2. synthesis / Timing closure

1. WiFi 無線通訊系統架構 2. WiFi IP數位設計 3. 計算機系統與周邊架構與數位設計 4. 系統晶片整合

1.發展多模NR/LTE L1/DSP軟體, 包含:狀態機/通道排程/數據機及RF控制 2.在嵌入式系統實現OFM信號處理機制 3.熟悉ASIP/DSP架構下的數位通訊

1. Collaborate with teams to execute the flow to work out cellular modem specification of wireless products 2. Collaborate with teams to align cellular product modem specification roadmap with cellular ECO and market

1. 無線網通系統, 數位設計 2. Micro Processor, 系統架構, low power/效能分析 3. SOC 整合/驗證 1. Wireless connecitivity system (GPS or BT or WiFi or FM or NFC or 60G) baseband or MAC design 2. uP/DSP system/peripheral architecture and digital circuit design 3. SoC chip integration / Verification

Power management IC design Audio IC design Data converter IC design high speed serdes IC design

In charge of technical program task execution to support team‘s goal

• Cellular ECO system夥伴關係 • Cellular modem新技術分析與市場技術走向分析 • Cellular ECO system engagement and partnership • Cellular modem new technology investigation and technical marketing