此(資深)職缺需以軟體/韌體設計的角度，進行聯發科技無線通訊網路相關IC設計方案的韌體白盒測試，包含WiFi、Bluetooth相關的功能。

透過影響力，激發並管理優化概念，與跨部門團隊、商務單位以及聯發科技的合作夥伴合作，創造優化像目並落實到產品端，達成商務目標。 1.

由於 先進製程 與 高整合度晶片 需要 較長的研發時間 及 高製造成本, DV (Design Verification) 已成為 聯發科技 晶片開發流程中 不可或缺的一環 .

由於 先進製程 與 高整合度晶片 需要 較長的研發時間 及 高製造成本, DV (Design Verification) 已成為 聯發科技 晶片開發流程中 不可或缺的一環 .

1. Collection mobile markets trend, new and innovation technologies transform to technical marketing opportunities 2. Prioritization of product requirements and feature requests to ensure key customer plan 3. Translates customer feedback and market environment variety into potential changes for product roadmap 4. Driving an ecosystem of AI third-party software algorithm to leverage the MediaTek APU platform

*負責執行智慧型手機DFT流程，並改善效率與提高測試度。 * DFT 測試架構規劃與實現 * DFT設計整合 * DFT 設計品質確保 * IC量產測試與品質, DPPM改善 * CP/FT/SLT 流程發展

Responsible for digital design verification of power management IC 1. Define verification plan 2. Create testbench and verify design functionality 3. Develop verification environment 4. Explore DV methodology

1) Manage and develop in-house design automation programs 2) Analyze and summarize memory usage profiling 3) Benchmark 3rd party memory IP 4) Co-work with circuit designer for memory compiler development 5) Other technical task assigned from manager

In charge of technical program task execution to support team‘s goal

• Leading Bluetooth protocol stack software development • Leading customer requirement implement and support

類比及射頻積體電路佈局工程師

Work location: Chupei/Taipei UWB architecture design for mobile market

1. Client Computing platform SW planning. 2. Long term SW roadmap planning for Notebook Products 3. Collaborate with teams to collect, understand, and analyze Microsoft Windows SW technology plan 4. Collaborate with teams to collect, understand, analyze, and refine customer requirement and scenarios 5. Collaborate with teams to define end-to-end feature requirements, including system/firmware software stack, system specification, performance requirements, verification criteria, and corresponding HW specification. 6. Technology selling to customers

MTK電源管理部門設計設計電源管理IC及電源管理單元以滿足各式各樣智慧手機, IOT, 車用, 以及ASIC的需求. 職缺包含: 1. DC-DC 轉換器 2. 線性電壓調節器 3. 切換電壓調節器

1.從系統應用功秏分析, 與 IP, SoC 與軟體團隊合作, 推進 SoC low power 軟硬體架構的演進. 2.產品規格定義時, 分析不同架構與 IP 選項, 在系統應用功秏體驗的差異, 產出產品應用 power dash board, 提供產品規格決策的依據. 3.執行或協助功秏量測, 與power model預估的功秏做校正 4.分析PMIC/Power rail 設計, SoC power state 與 data-path power等, 並且提出SOC 設計優化方案 5.提出系統優化的方向, 達到最佳的產品電池使用續航時間與使用體驗

RFFE engagement with 3rd party to identify Adv. RFFE technologies— including cellular and WiFi

1. 先進製程(＜N5)的可測試電路實作流程開發 2. 先進製程(N4/N3)可測試錯誤模型的研究與實作 3. 針對超高速與超低壓電路錯誤模型的研究與實作 4. 量產測試dppm分析與除錯, 測試效率的改善 5. 系統軟硬體測試的分析與除錯

• You will work as part of analog project management team and work closely with SoC Integration teams responsible for enabling on-time silicon to meet aggressive product schedules. • Multi-task skills will be key to lead several tasks of project at a time. • Track and drive resolution of technical issues between multi-functional teams including Design, Verification, Validation, Process Technology, Packaging, Quality and Reliability, System Hardware and Application. • Convert data into a clear story to communicate to partners and organizations at all levels. • Pull together regular project status presentations for executive leadership review. • Identify risks, develop mitigation strategies and facilitate conflict resolution. • Collaborate with software/hardware teams for silicon validation of analog IPs • Deliver highly focused and detailed issue reporting, bug tracking and communication of risks and status

1.開發Bluetooth/ZigBee韌體並實現Bluetooth/ZigBee最新規格. 2.開發Bluetooth, WiFi, ZigBee, LTE, 5GNR共存技術. 3.與硬體與軟體共同開發 Bluetooth/ZigBee 系統架構. 4.協助手機,消費性產品客戶 最佳化效能 與解決問題.

This position will be involved in the design methodology development with Foundry and EDA in leading-edge process node: 1. Will work extensively with micro-architects to make best-in-class performance/power/area 2. Will drive RTL-to-GDS flow through synthesis and place-and-route to achieve competitive targets for performance/power/area 3. Will work with multi-functional engineering team to implement and validate physical design on the aspects of timing, power, area, reliability, and test-ability

- Develop robust 3DIC PDN considering PDN impacts - Build and analyze 3DIC IR results and propose solutions - Define area-efficient stacking possibilities, robust PG structure for different IP styles - Provide quick assessment to IR severity and improved approaches - Explore EDA tool new features and introduce to project team

1. 先進 5G 智慧型手機 SoC 設計整合 2. 先進製程 IC 設計實現與技術開發 3. 關鍵 IP Modem, DRAMC, ISP RTL-2-GDS technology development

Multi-RAT (6G/5G/4G/3G/2G) modem development. This is a common job description. You may involve at least one or more topics in the following: (1) architecture planning 1.1 Modem/SoC TOP system architecture 1.2 Modem/SoC CPU system design 1.3 Modem/SoC DSP system design 1.4 Modem/SoC BUS system design (2) digital circuit design and verification 2.1 baseband modules 2.2 digital front-end modules 2.3 RF/mixed-mode digital control modules 2.4 Computer/network system modules 2.5 High speed interface design (3) IP integration 3.1 Clock/reset, test modeand low power mode design 3.2 floorplan and synthesis development (4) Design methodology 4.1 design flow enhancement (low power/verification/etc) 4.2 chip MP quality control flow

1. 系統分析: 評估及分析系統效能/功耗及應用程式行為分析拆解 2. 工具開發: 開發特有的工具加速系統分析及性能決策(自動化/抽取性能指標) 3. 效能優化: 跨團隊合作優化系統效能/功耗或改善應用行為

• Leading 802.11BE & wearable software structure & algorithm development • Leading customer requirement implement and support

1. 無線網通系統, 數位設計 2. Micro Processor, 系統架構, low power/效能分析 3. SOC 整合/驗證 1. Wireless connecitivity system (GPS or BT or WiFi or FM or NFC or 60G) baseband or MAC design 2. uP/DSP system/peripheral architecture and digital circuit design 3. SoC chip integration / Verification

1. 無線通訊系統安全開發 2. 無線通訊系統驅動程式開發 3. 無線通訊系統軟體穩定性 4. 無線通訊晶片驗證 5. 熟悉Linux/RTOS 核心

(1) 負責WLAN網路架構系統評估 (2) 負責Wi-Fi7 新功能開發與軟硬體架構規劃 (3) 負責新規格 Wi-Fi7 無線網路系統軟硬體雛型系統開發, 模擬與系統效能分析

In this role, you will be a member of the System-on-Chip (SoC) platform modeling team, working with architecture, silicon and software engineering teams to shape the architecture of MediaTek‘s future SoCs. The position calls for independent performance modeling and analysis, documentation, and collaboration with teams across MediaTek. We are looking for highly motivated, hands-on individuals who are passionate about performance modeling of sophisticated SoC features in C++/Python to demonstrate their value and impact. Major Responsibilities: •Responsible for evaluating and improving the SoC performance and efficiency •Developing C++ performance models (C-model) of SoC architectural solutions and features. •Developing tests and microbenchmarks to represent the use cases to run on the model •Gathering and analyzing simulated performance data to evaluate architectural design alternatives under various SoC workloads and benchmarks. •Correlating performance of the SoC RTL infrastruct

對於Smartphone AP SoC，從系統效能、功率消耗、實現與應用成本等多重面向分析產品競爭力，進而從系統角度優化硬體架構及軟體配套策略。